ADLINK Technology 72XX Series Manual do Utilizador Página 39

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Operation Theory 25
72XX Series
User’s Manual
4 Operation Theory
4.1 Digital I/O Ports
4.1.1 Introduction
The 7248/96 products can emulate one/two/four mode 0 configu-
ration of 8255 programmable peripheral interface (PPI) chips.
There are 24 DIO signals for every PPI.
4.1.2 8255 Mode 0
The basic functions of 8255 mode 0 are:
Two 8-bit I/O ports-port A (PA) and port B (PB)
Two nibble-wide (4-bit) ports C-PC upper and PC lower
Each port can be used as either input or output
Outputs are latched whereas inputs are buffered
16 different input/output configurations are available
4.1.3 Special Function of the DIO Signals
Two I/O signals (PC0 and PC3) of CN1 and CN2 can be used to
generate hardware interrupt. Refer to section 4.3 for details on the
interrupt control. In addition, the P1C4 signals can be used as
input signal of event counter.
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